Home >


  • Current source load mosfet

    Current source load mosfetJuly 21

    Guys I have a silly doubt. above is a standard circuit. I wish to ask how can a small signal current exist through the transistor shown above? The current source ( which is dc) will always force the saturation cureent of nmos to be = ID. So how can t

  • Analysis of a Common Source MOSFET Amplifier

    Analysis of a Common Source MOSFET AmplifierFebruary 15

    Here's a design question our prof gave us to study for the exam. I'm having trouble putting it together. The transistor has the the following properties: Kn: 1.4mA/V^2: Vtn = 0.2V; λ=0.01 V^-1; Cgs=5pf; Cgd=0.8pf A 5V peak-to-peak sine wave is seen a

  • Biasing using constant current source

    Biasing using constant current sourceFebruary 11

    guys i was going through this diagram in my book when these lines came along(i am a student): Here RG(usually in M-ohm range) establishes a dc ground at the gate and presents a large resistance to input signal..... I want to ask why resistor is used?

  • Voltages to keep my circuit running at 200mA with NMOSFETS

    Voltages to keep my circuit running at 200mA with NMOSFETSFebruary 7

    Im trying to build a circuit to send information using IR led, using pulse signals my leds (TSAL6400) operates at 1.35V, and their maximum pulse current is rated 200mA After struggling a bit with BJT transistors, and realizing that since I'll send th

  • 3-pin MOSFET: P or N type?

    3-pin MOSFET: P or N type?February 5

    This may be a silly one but I couldn't seem to find an explicit answer: with a 3-pin MOSFET, how do I determine whether it's an NMOS or PMOS? I'm making some assumptions here: I've already found the Gate pin, which has no conduction to the other two

  • microelecectronics doubt

    microelecectronics doubt January 25

    I was going through Sedra and Smith (6th edition) and had a doubt. In example 4.11 (page-405), how do we know in a question if we have to join G and S terminals and there will be a current flowing through Rg which is of 10MOhm. In the equivalent smal

  • Multistage CMOS amplifier designJanuary 14

    my professor gave us a task to design a multistage amplifier using NMOS and PMOS transistors with a minimum width W=18um, 1.8v battery(multiple if needed and any sort of resistor/capacitor. The only requirements are: Voltage amplification: A=10 Input

  • Basic Nmos amplifier working

    Basic Nmos amplifier workingDecember 28

    I am trying to understand this circuit here. I do not understand clearly how this works. I know that the PMOS is a current source but what impact does the resistor Rb have on this ? Could anyone help me out with its working ? --------------Solutions-

  • Trying to simulate the linear region of a MOSFET

    Trying to simulate the linear region of a MOSFETDecember 6

    I wanted to simulate the linear region, so I tried this: – Schematic created using CircuitLab I expected the triangle wave to be curved, but it didn't have those features. Am I doing something wrong or am I expecting the wrong results? How does one u

  • Can a NMOS transistor be used as a Current Controlled Voltage Source?November 28

    Assuming an NMOS transistor is in saturation. Can you apply a current \$I_{DS}\$, resulting in an output gate-source voltage (\$V_{GS}\$)? --------------Solutions------------- The gate is isolated so by itself it cannot generate a voltage. An NMOS on

  • NMOS - Why is a resistor necessary?November 26

    I understand how the logic levels of an NMOS work with a pull-up resistor. 1. What would happen though if there was no resistor attached? (What would the logic levels look like and why?) 2. What would happen if there was a pull down resistor instead?

  • Depletion Mosfet working as enhancement NMOS

    Depletion Mosfet working as enhancement NMOSNovember 23

    The depletion mosfet can also operate in enhancement mode when the gate voltage is positive (say for depletion type NMOS). My question is : Will the Shockley equation be still valid in the enhancement mode? or Should we use the equations of enhanceme

  • Bias common source diode connected load

    Bias common source diode connected loadNovember 17

    To amplify small signal we need to bias M1 and M2 in saturation mode. Obviously, M2 is always in saturation because Vgd = 0. However, how should I bias M1 in saturation? --------------Solutions------------- In order to keep M1 in saturation, Vg - Vth

  • Biasing an NMOS to get rid of \$V_{th}\$

    Biasing an NMOS to get rid of \$V_{th}\$November 2

    So here's a common way of cancelling out the \$V_{th}\$ in an NMOS. Am I better of use a good quality zener (in series with a resistor) or stick with voltage divider R1 and R2 below. Assuming we can have very low tolerances for R1 and R2 and we can c

  • MOSFET shorted after I connect them in parallel, what's wrong?October 28

    One of my MOSFET source-drain shorted after I connect them in parallel? So I was making an ARC speaker yesterday, and I used one MOSFET ( irf540), and it got really hot, but it did not blow up, so I decided to put another MOSFET connected in parallel

  • SOT-23 NMOS transistor power dissipation

    SOT-23 NMOS transistor power dissipationOctober 9

    I am working on a design of a control system that controls a few small solenoids, each drawing about 200 mA of current and operating at 15-18 V. These solenoids are activated by NMOS transistors. Due to the size constraint that I have for the PCB con

  • Simple NMOS transistor circuit output impedance

    Simple NMOS transistor circuit output impedanceOctober 6

    I am having trouble figuring out the best way to determine the output impedance of this simple NMOS transistor circuit: Both transistors are equal, and the body effect is ignored. What method should I use to find the output impedance? Should I find t

  • CMOS: Why is an nMOS transistor a bad conductor of high logic, but a good conductor of low?

    CMOS: Why is an nMOS transistor a bad conductor of high logic, but a good conductor of low?October 2

    I can't find an answer that addresses this and makes sense to me. I know that V_t is subtracted from the 'output', but I don't understand why. --------------Solutions------------- It's all to do with gate voltages. A standard Enhancement Mode NMOS re

  • Gate voltage and drain current relation

    Gate voltage and drain current relationSeptember 27

    I am new to electronics and have the following doubt. Say Vgs= 3V to a NMOS produces Id= 3A. Now if we place a 3A current source at the drain,will it cause a 3V at the gate, when the gate is open (assume source is grounded) ? Why? Also what happens w

  • High Drain Current MOSFET vs Low Drain Current MOSFET for Synchronous Buck ConverterSeptember 2

    For a battery charging application, i have to build a synchronous buck converter (i/p voltage = 12V , o/p Voltage = 4.5V) which would be driven by a PWM signal from the micro-controller. This Buck converter's operating frequency would be around 62kHz

Copyright (C) 2018 ceus-now.com, All Rights Reserved. webmaster#ceus-now.com 14 q. 0.452 s.